第28课 · 中断控制器

CLINT (Core Local Interruptor):
  - 产生软件中断（MSIP）
  - 产生定时器中断（MTIMER）
  - 每个核独有

PLIC (Platform-Level Interrupt Controller):
  - 管理外部中断源
  - 中断优先级仲裁
  - 中断使能/挂起/优先级阈值

外部中断源 → PLIC优先级仲裁 → 中断门控(阈值+使能)
  → 核心中断信号 → CPU保存上下文 → 跳转处理
  → 处理完成 → MRET返回

CLINT定时器：mtime ≥ mtimecmp → 触发定时器中断

// interrupt_controller.v — CLINT+PLIC简化 "keyword">module interrupt_controller ( "keyword">input clk, rst, "keyword">input [3:0] irq_sources, "keyword">input [1:0] cpu_priv, "keyword">input cpu_mie, "keyword">output "keyword">reg cpu_irq, "keyword">output "keyword">reg [3:0] cpu_irq_id, "keyword">output "keyword">reg timer_irq, "keyword">input [63:0] mtime, mtimecmp, "keyword">input [3:0] plic_enable, "keyword">input [2:0] plic_threshold, "keyword">input [3:0] plic_claim ); "keyword">reg [2:0] priority [0:3]; "keyword">reg [3:0] pending; "keyword">reg [2:0] max_priority; "keyword">reg [3:0] max_id; "keyword">integer i; "keyword">always @(*) "keyword">begin max_priority=0; max_id=0; "keyword">for (i=0;i<4;i=i+1) "keyword">if (pending[i]&&plic_enable[i]&&priority[i]>max_priority) "keyword">begin max_priority=priority[i]; max_id=i[3:0]; "keyword">end "keyword">end "keyword">always @("keyword">posedge clk "keyword">or "keyword">posedge rst) "keyword">begin "keyword">if (rst) "keyword">begin cpu_irq<=0; cpu_irq_id<=0; timer_irq<=0; pending<=0; priority[0]<=1; priority[1]<=2; priority[2]<=3; priority[3]<=4; "keyword">end "keyword">else "keyword">begin pending<=pending|irq_sources; "keyword">if (plic_claim[0]) pending[0]<=0; "keyword">if (plic_claim[1]) pending[1]<=0; "keyword">if (plic_claim[2]) pending[2]<=0; "keyword">if (plic_claim[3]) pending[3]<=0; timer_irq<=(mtime>=mtimecmp); "keyword">if (max_priority>plic_threshold && cpu_mie && cpu_priv==2'b11) "keyword">begin cpu_irq<=1; cpu_irq_id<=max_id; "keyword">end "keyword">else cpu_irq<=0; "keyword">end "keyword">end "keyword">endmodule

// tb_interrupt_controller.v "keyword">module tb_interrupt_controller; "keyword">reg clk,rst; "keyword">reg [3:0] irq_sources; "keyword">reg [1:0] cpu_priv; "keyword">reg cpu_mie; "keyword">wire cpu_irq; "keyword">wire [3:0] cpu_irq_id; "keyword">wire timer_irq; "keyword">reg [63:0] mtime,mtimecmp; "keyword">reg [3:0] plic_enable,plic_claim; "keyword">reg [2:0] plic_threshold; interrupt_controller uut(.*); "keyword">integer pass=0,fail=0; "keyword">always #5 clk=~clk; "keyword">initial "keyword">begin clk=0;rst=1;irq_sources=0;cpu_priv=2'b11;cpu_mie=1; mtime=0;mtimecmp=100;plic_enable=4'hF;plic_threshold=0;plic_claim=0; #12;rst=0; irq_sources=4'b0010; #10; "keyword">if (cpu_irq) pass=pass+1; "keyword">else "keyword">begin $display("FAIL1"); fail=fail+1; "keyword">end irq_sources=0;plic_claim=4'b0010;#10;plic_claim=0;#10; irq_sources=4'b0101; #10; "keyword">if (cpu_irq_id===4'd2) pass=pass+1; "keyword">else "keyword">begin $display("FAIL2"); fail=fail+1; "keyword">end plic_claim=4'b0100;#10;plic_claim=0;irq_sources=0;#10; plic_threshold=3'd3; irq_sources=4'b0001; #10; "keyword">if (!cpu_irq) pass=pass+1; "keyword">else "keyword">begin $display("FAIL3"); fail=fail+1; "keyword">end plic_threshold=0;irq_sources=0;#10; mtime=64'd100; #10; "keyword">if (timer_irq) pass=pass+1; "keyword">else "keyword">begin $display("FAIL4"); fail=fail+1; "keyword">end $display("========================================"); $display("中断控制器测试: PASS=%0d FAIL=%0d",pass,fail); "keyword">if (fail==0) $display("✅ CLINT+PLIC中断逻辑正确！"); "keyword">else $display("❌ 存在失败！"); $display("========================================"); $finish; "keyword">end "keyword">endmodule