🖥️ 第34课：FPGA操作系统

// FPGA微型操作系统 - 轮转调度 + 中断
module fpga_micro_os #(
    parameter TASK_NUM = 4,
    parameter MEM_ADDR = 10,    // 10位地址 = 1K×32bit
    parameter MEM_DATA = 32
)(
    input  wire        clk,
    input  wire        rst,
    // 中断输入
    input  wire [7:0]  irq,         // 8个中断源
    // 外设接口
    input  wire [7:0]  uart_rx_data,
    input  wire        uart_rx_valid,
    output reg  [7:0]  uart_tx_data,
    output reg         uart_tx_start,
    // VGA状态显示
    input  wire [9:0]  hcount, vcount,
    input  wire        video_on,
    output wire [2:0]  rgb,
    // 系统状态
    output reg  [3:0]  current_task,
    output reg  [7:0]  task_states,  // 每个任务状态LED
    output reg         os_running
);
    // 任务控制块(TCB)
    reg [MEM_DATA-1:0] task_pc     [0:TASK_NUM-1];
    reg [MEM_DATA-1:0] task_sp     [0:TASK_NUM-1];
    reg [3:0]          task_state  [0:TASK_NUM-1]; // 0=就绪, 1=运行, 2=等待, 3=完成
    reg [7:0]          task_prio   [0:TASK_NUM-1];
    reg [15:0]         task_timer  [0:TASK_NUM-1];

    // 全局内存(BRAM)
    reg [MEM_DATA-1:0] main_mem [0:1023];
    reg [MEM_ADDR-1:0] mem_addr;
    reg                mem_wr;
    reg [MEM_DATA-1:0] mem_wdata;
    wire [MEM_DATA-1:0] mem_rdata = main_mem[mem_addr];

    // 调度器 - 时间片轮转
    localparam TIME_SLICE = 1000; // 每个任务1000周期
    reg [15:0] slice_cnt;
    reg [3:0]  next_task;

    always @(posedge clk) begin
        if (rst) begin
            current_task <= 0;
            slice_cnt <= 0;
            os_running <= 0;
            for(integer i=0; i<TASK_NUM; i=i+1) begin
                task_pc[i] <= 0;
                task_sp[i] <= 256 * (i + 1);
                task_state[i] <= 0;
                task_prio[i] <= i;
                task_timer[i] <= 0;
            end
        end else begin
            os_running <= 1;
            slice_cnt <= slice_cnt + 1;

            // 时间片到期→切换任务
            if (slice_cnt >= TIME_SLICE) begin
                slice_cnt <= 0;
                task_state[current_task] <= 0; // 挂起当前

                // 找下一个就绪任务
                next_task = (current_task + 1) % TASK_NUM;
                for(integer i=0; i<TASK_NUM; i=i+1) begin
                    integer t;
                    t = (current_task + 1 + i) % TASK_NUM;
                    if (task_state[t] == 0) begin
                        next_task = t;
                        i = TASK_NUM; // break
                    end
                end
                current_task <= next_task;
                task_state[next_task] <= 1; // 运行
            end

            // 更新任务计时器
            task_timer[current_task] <= task_timer[current_task] + 1;
        end
    end

    // 中断控制器
    reg [7:0] irq_pending, irq_mask;
    reg       irq_handling;
    reg [2:0] irq_id;

    always @(posedge clk) begin
        if (rst) begin
            irq_pending <= 0; irq_mask <= 8'hFF;
            irq_handling <= 0;
        end else begin
            // 捕获中断
            irq_pending <= irq_pending | (irq & irq_mask);
            // 优先级仲裁
            if (!irq_handling && irq_pending != 0) begin
                irq_handling <= 1;
                if (irq_pending[0]) irq_id <= 0;
                else if (irq_pending[1]) irq_id <= 1;
                else if (irq_pending[2]) irq_id <= 2;
                else if (irq_pending[3]) irq_id <= 3;
                else if (irq_pending[4]) irq_id <= 4;
                else if (irq_pending[5]) irq_id <= 5;
                else if (irq_pending[6]) irq_id <= 6;
                else irq_id <= 7;
                irq_pending[irq_id] <= 0;
            end else if (irq_handling) begin
                // 简化: 1周期处理完
                irq_handling <= 0;
            end
        end
    end

    // UART中断处理
    always @(posedge clk) begin
        if (uart_rx_valid && irq_handling && irq_id == 0) begin
            main_mem[512] <= {24'h0, uart_rx_data};
        end
    end

    // 更新任务状态显示
    always @(*) begin
        for(integer i=0; i<TASK_NUM; i=i+1)
            task_states[i*2 +: 2] = task_state[i][1:0];
    end

    // VGA状态显示
    reg [2:0] pixel_rgb;
    always @(*) begin
        if (!video_on) pixel_rgb = 3'b000;
        else begin
            // 显示任务状态条
            case(hcount[7:6])
                0: pixel_rgb = (task_state[0]==1) ? 3'b010 : 3'b001;
                1: pixel_rgb = (task_state[1]==1) ? 3'b010 : 3'b001;
                2: pixel_rgb = (task_state[2]==1) ? 3'b010 : 3'b001;
                3: pixel_rgb = (task_state[3]==1) ? 3'b010 : 3'b001;
            endcase
            // 中断指示
            if (irq_handling) pixel_rgb = 3'b100;
        end
    end
    assign rgb = pixel_rgb;

endmodule

module fpga_micro_os_tb;
    logic clk=0, rst=1;
    logic [7:0] irq=0;
    logic [7:0] uart_rx_data=0;
    logic uart_rx_valid=0;
    logic [7:0] uart_tx_data;
    logic uart_tx_start;
    logic [9:0] hcount=0, vcount=0;
    logic video_on=1;
    logic [2:0] rgb;
    logic [3:0] current_task;
    logic [7:0] task_states;
    logic os_running;

    fpga_micro_os uut(.*);
    always #10 clk = ~clk;

    initial begin
        rst=1; #50; rst=0;
        $display("--- FPGA微型OS测试 ---");
        // 等待几个时间片
        repeat(5000) @(posedge clk);
        $display("  current_task=%0d os_running=%b", current_task, os_running);
        // 触发中断
        irq[0]=1; #20; irq[0]=0;
        #100;
        $display("  中断处理完成 ✓");
        // UART中断
        uart_rx_data=8'h42; uart_rx_valid=1;
        irq[0]=1; #20; irq[0]=0; uart_rx_valid=0;
        #100;
        $display("  UART数据写入内存 ✓");
        $display("FPGA微型OS测试完成 ✓");
        #100; $finish;
    end
endmodule