// ============================================================================
// vga_controller.v - VGA 640x480 @60Hz 完整时序控制器
// 像素时钟: 25.175MHz (实际使用25MHz，误差<1%)
// ============================================================================
module vga_controller (
    input  wire        clk25,
    input  wire        rst_n,
    output reg  [9:0]  hcount,     // 水平像素计数
    output reg  [9:0]  vcount,     // 垂直行计数
    output wire        hsync,      // 水平同步
    output wire        vsync,      // 垂直同步
    output wire        blank,      // 消隐（1=不显示）
    output wire        active      // 有效显示区域
);

    localparam H_VIS = 640, H_FP = 16, H_SYNC = 96, H_BP = 48, H_TOTAL = 800;
    localparam V_VIS = 480, V_FP = 10, V_SYNC = 2,  V_BP = 33, V_TOTAL = 525;

    always @(posedge clk25 or negedge rst_n) begin
        if (!rst_n) begin
            hcount <= 10'd0;
            vcount <= 10'd0;
        end else begin
            if (hcount == H_TOTAL - 1) begin
                hcount <= 10'd0;
                if (vcount == V_TOTAL - 1)
                    vcount <= 10'd0;
                else
                    vcount <= vcount + 10'd1;
            end else begin
                hcount <= hcount + 10'd1;
            end
        end
    end

    assign hsync  = ~((hcount >= H_VIS + H_FP) && (hcount < H_VIS + H_FP + H_SYNC));
    assign vsync  = ~((vcount >= V_VIS + V_FP) && (vcount < V_VIS + V_FP + V_SYNC));
    assign blank  = (hcount >= H_VIS) || (vcount >= V_VIS);
    assign active = ~blank;

endmodule